verible
verible_lint(IP_LIB **kwargs)
Verible lint tool interface
This function will create a target for linting the SystemVerilog files, more information about the tool can be found here.
It expects that IP_LIB INTERFACE_LIBRARY has SOURCES property set with a list of System Verilog files to be used as inputs.
Function will create targets for linting or formatting depending on passed option
Parameters
| Name | Type | Description |
|---|---|---|
IP_LIB | string | The target IP library. |
Keyword Arguments
| Name | Type | Description |
|---|---|---|
REQUIRED | bool | if option REQUIRED is passed, the IP_LIB will depend on linting target, meaning that the linting will be done as soon as all the Verilog files are generated. By default only a new target <IP_LIB>_verible_lint is created and can be run optionally. |
OUTDIR | string path | output directory in which the files will be generated, if omitted ${BINARY_DIR}/verible will be used. |
AUTOFIX | [no | patch-interactive |
RULES | List[string] | list of rules to enable or disable for reference look at verible documentation |
RULES_FILE | path string | Additionally, the RULES_FILE flag can be used to read configuration stored in a file. The syntax is the same as RULES, except the rules can be also separated with the newline character |
WAIVER_FILES | list[string] | Path to waiver config files (comma-separated). Please refer to the README file for information about its format. |
ONLY_TOP | bool | If set, only lint the source files belonging directly to IP_LIB, without traversing its dependencies. |
SKIP_GENERATED | bool | If set, exclude files marked with the CMake GENERATED source property from linting. |